Senior Silicon Engineer- P and D- (gCPU), Design Verification (multiple openings)

Senior Silicon Engineer- P and D- (gCPU), Design Verification (multiple openings)
Minimum qualifications
Bachelor’s degree in Electronics or Electrical Engineering, Physics, Computer Science, Computer Engineering, or a related field and 6 years of progressive, post-baccalaureate experience in the job offered or in a Silicon Engineer-related occupation.
Alternatively, will accept a Master’s degree in Electronics or Electrical Engineering, Physics, Computer Science, Computer Engineering, or a related field and 4 years of experience in the job offered or in a Silicon Engineer-related occupation.
Position requires 4 years of experience in the following: Computer processor architecture and processor microarchitecture; Object-oriented programming verification language (SystemVerilog , C++, or VHDL) and Constrained random verification; Formal verification tools (Jasper or VC Formal), Simulation (VCS and Xcelium), Emulation (Cadence, Synopsys, and Siemens), or Post-silicon validation; and Technical leadership role.