Integrated Circuit Package Design Engineer
Google · зарплата не указана · Sunnyvale, CA, USA / Los Angeles, CA, USA · сайт компании · опубликовано 8 июня 2026 г.
Описание вакансии
Integrated Circuit Package Design Engineer
Minimum qualifications
Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering, Technology, Science, a related field, or equivalent practical experience.
4 years of experience in chip package design/layout using Cadence allegro package designer (APD) or Mentor Expedition.
Experience in chip package substrate layout, optimization, design verification, design for manufacturability (DFM) and taping out for production.
Experience in design automation and scripting.